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Description:

The RED5 is a kind of complementary MOS (CMOS) divider circuit. It is divided by 5. The typical application include time base generator from either 50 Hz or 60 Hz line frequency to produce 10 pulses per second. Then is about the introduction about the operation. The counter advances by one on each negative transition of the input clock pulse as long as the enable signal is "high" and the reset signal is "low". When the enable signal is "low" the input clock pulses will be inhibited and the counter will be held at the state it was in prior to bringing the enable "low". A "high" reset signal clears the counter ro zero count.

There are some features as follows: (1)clock input pusle shaper accepts 50 Hz/60 Hz sine wave directly; (2)fully static counter operation; (3)+4.5 V to +15 V operation (VDD-VSS); (4)low power dissipation; (5)high noise immunity; (6)reset; (7)input enable ; (8)50 Hz/60 Hz division select input; (9)output low power TTL compatible at +4.5 V operation; (10)all inputs protected.

The following is about the maximum ratings: (1)DC supply voltage, VDD: +18 to -0.5 Vdc; (2)input voltage, VIN: VDD to VSS V; (3)operating temperature range, TA: -40 to +85℃; (4)storage temperature range, Tstg: -65 to +150℃.